WFI interrupt checking mechanism and return address issue

Description

This problem is more easier to reproduce when having hypervisor running in M mode, as WFI triggers intrusction fault to yield scheduling on CPU when TW bit is set in mstatus CSR. After mret, it would be repeately go back to WFI itself rather than pc+4, so as to repeatly trigger the trap. This is not intended behavior. And interrupt dection mechnism is not aligned with spec, as current linux kernel disable interrupt before entering WFI so interrupt triggering should negelect the global interrupt enable bits in CSR.

Environment

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Cui Jin
March 11, 2021, 1:07 AM

Yes, trying to do that.

Bobby Bruce
March 10, 2021, 6:42 PM

As you’ve assigned yourself to this, does this mean you’re going to fix it?

Assignee

Unassigned

Reporter

Cui Jin

Priority

Low

Fix versions

Components