Changing ISA Decoder
CSR extra PMP registers
CSR instruction behavior
Option to switch between RV32 and RV64 (in build_opts?)
For the last bullet, it would be nice if we could enable the switch at runtime as a python parameter. The decoder isn’t too different. In fact, I think that the register sizes would probably be the hardest part of making it a runtime option…
Anyway, thanks for getting this started!
I am opening this ticket to discuss the possible tasks necessary for supporting RV32. Hopefully this will give us a rough sense of the required workload if the feature is requested in the future.
I have added a few based on my understanding, please add to the list if you are aware of other necessary changes to support RV32.