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Improvement
Is instruction-level profiling possible with gem5 simulation?
Unassigned
Minho Ha
Highest
Done
Nov 21, 2021
Nov 28, 2021
Improvement
Don't reference the specific BaseSimpleCPU type in the SimpleThread::htmAbortTransaction method
Unassigned
Gabe Black
Medium
Done
Oct 25, 2021
Nov 30, 2021
New Feature
Is gem5 importable from python?
Unassigned
david mlw
Medium
Done
Oct 8, 2021
Oct 18, 2021
Bug
Gem5 tests don't seem to check the return code of the simulation
Unassigned
Davide Basilio Bartolini
Highest
Done
Sep 28, 2021
Oct 27, 2021
Improvement
Implement POSIX syscalls with "at" suffix
Unassigned
Giacomo Travaglini
Medium
Done
Sep 28, 2021
Oct 13, 2021
Bug
ARM SE mode: Cannot access file (RISCV runs OK)
Unassigned
Rohit Singh
Medium
Done
Sep 20, 2021
Oct 12, 2021
Bug
scons failed to buiild gem5 before git-hooks installed
Unassigned
Hoa Nguyen
Medium
Done
Sep 18, 2021
Sep 18, 2021
Bug
DerivO3CPU model hangs when resume from a checkpoint
Unassigned
Luming Wang
Highest
Done
Sep 12, 2021
Sep 29, 2021
Bug
KVM to Timing CPU switching does not function properly in the gem5 library
Unassigned
Austin Harris
Medium
Done
Sep 10, 2021
Sep 22, 2021
Task
The X86 boot exit test should be refactored to run any command on boot, not just `m5 exit`
Unassigned
Bobby Bruce
Medium
Done
Sep 1, 2021
Oct 27, 2021
Task
Add a `exit.sh` script to the RISCV disk image
Unassigned
Bobby Bruce
Medium
Done
Sep 1, 2021
Oct 27, 2021
Task
Setup the RISCV disk image to run `m5 readfile` after booting
Unassigned
Bobby Bruce
Medium
Done
Sep 1, 2021
Oct 27, 2021
Task
Alter the RISCV disk image resource to auto-login on boot
Unassigned
Bobby Bruce
Medium
Done
Sep 1, 2021
Oct 27, 2021
Bug
The RISCV disk image does not contain m5 utilities
Unassigned
Bobby Bruce
Medium
Done
Sep 1, 2021
Oct 27, 2021
Bug
32 bit syscalls cause segfault
Unassigned
Jason Lowe-Power
Medium
Done
Aug 30, 2021
Oct 13, 2021
Improvement
Questions about gem5 RISC-V vector model configuration file
Unassigned
Minho Ha
Highest
Done
Aug 16, 2021
Aug 21, 2021
Bug
gem5 version v21 FS mode bring up multi-core failed
Unassigned
chen boya
Medium
Done
Aug 13, 2021
Aug 13, 2021
Bug
"maxEntryCount" datatype is too shallow for larger LLC and multicore
Unassigned
Majid Jalili
Medium
Done
Aug 8, 2021
Aug 9, 2021
Improvement
Fix some ISA specific ifdefs in the minor CPU.
Unassigned
Gabe Black
Medium
Done
Jul 25, 2021
Aug 4, 2021
Improvement
Eliminate THE_ISA_STR and find an alternative for checkpoint files
Unassigned
Gabe Black
Medium
Done
Jul 25, 2021
Jul 31, 2021
Improvement
Eliminate the arch/locked_mem.hh header file.
Unassigned
Gabe Black
Medium
Done
Jul 25, 2021
Sep 28, 2021
Improvement
Eliminate the arch/page_size.hh switching header file.
Unassigned
Gabe Black
Medium
Done
Jul 25, 2021
Oct 22, 2021
Improvement
Eliminate the arch/pcstate.hh switching header file.
Unassigned
Gabe Black
Medium
Done
Jul 25, 2021
Nov 30, 2021
Bug
Failed to boot Linux using gem5-RISCV
Unassigned
Hoa Nguyen
Medium
Done
Jul 14, 2021
Jul 25, 2021
Bug
Error when calling bits function in ARM HTM Checkpoint
Unassigned
Javier García
Low
Done
Jul 12, 2021
Jul 13, 2021
Bug
SimpleNetwork does not fully support virtual networks
Unassigned
Gabriel Busnot
Medium
Done
Jul 8, 2021
Nov 30, 2021
New Feature
Upstream 64-bit POWER SE
Unassigned
Boris Shingarov
Medium
Done
Jul 7, 2021
Jul 7, 2021
Bug
Support for Linux kernel arm64 v5.11+ with PAN enabled.
Unassigned
Richard Cooper
Medium
Done
Jul 7, 2021
Jul 8, 2021
Bug
Protobuf compile failure on Ubuntu 21.04
Unassigned
Allison Randal
Medium
Done
Jul 7, 2021
Jul 20, 2021
Task
The Components Library X86 board's I/O subsystem is hardcoded. This should be fixed.
Unassigned
Bobby Bruce
Medium
Done
Jul 6, 2021
Aug 27, 2021
Task
The Components Library X86 board is hardcoded to 3GB of memory. This should be fixed
Unassigned
Bobby Bruce
Medium
Done
Jul 6, 2021
Aug 27, 2021
Bug
hdf5 stats are broken in 21.0.1
Unassigned
Davide Basilio Bartolini
Medium
Done
Jul 6, 2021
Jul 7, 2021
Bug
gem5 failed to compile on RISCV with systemc enabled
Unassigned
Hoa Nguyen
Medium
Done
Jul 5, 2021
Jul 6, 2021
Bug
TimingSimpleCPU fails to compile for POWER
Unassigned
Boris Shingarov
Medium
Done
Jul 3, 2021
Jul 14, 2021
Bug
KVM Mode does not function in the Component Library SimpleProcessor.
Unassigned
Bobby Bruce
Medium
Done
Jul 1, 2021
Oct 26, 2021
Task
Figure out how best to distribute the gem5 compents library with gem5
Unassigned
Bobby Bruce
Medium
Done
Jul 1, 2021
Sep 29, 2021
Task
Add functionality to the components library to download from gem5 resources
Unassigned
Bobby Bruce
Medium
Done
Jul 1, 2021
Sep 22, 2021
Task
Improve the documentation for `components_library/cachehierarchies/ruby/caches`
Unassigned
Bobby Bruce
Medium
Done
Jul 1, 2021
Aug 27, 2021
Bug
gem5 failed to compile on RISCV (HiFive Unmatched board, Ubuntu 21.04)
Unassigned
Hoa Nguyen
Medium
Done
Jun 29, 2021
Jul 12, 2021
Bug
syscall mincore fatal when using miopen in gem5 docker image
Unassigned
jun hua
Medium
Done
Jun 27, 2021
Jul 8, 2021
Improvement
RISC-V vector extension official support plan inquiry
Unassigned
Minho Ha
Medium
Done
Jun 17, 2021
Jun 24, 2021
Bug
AddrRangeMap::find algorithm fails for certain interleaved address ranges
Unassigned
Carlos Falquez
Medium
Done
Jun 17, 2021
Jun 28, 2021
Bug
Heap use-after-free bug in mem_ctrl.cc
Unassigned
Luming Wang
Medium
Done
Jun 16, 2021
Jun 29, 2021
Bug
Fails to build with scons 4
Unassigned
Ross Burton
Medium
Done
Jun 8, 2021
Jun 8, 2021
Bug
X86 ISA failing to compile in GCC 5
Unassigned
Bobby Bruce
Medium
Done
Jun 4, 2021
Sep 21, 2021
Bug
Segementation fault while running simple example from the tutorial
Unassigned
Nicolas Peslerbe
Medium
Done
Jun 2, 2021
Jun 3, 2021
Bug
CHI Cache_Controller::functionalRead() never reads clean cache data
Unassigned
Gabriel Busnot
Medium
Done
May 28, 2021
Jun 10, 2021
Bug
"--redirects" option doesn't work in for se.py
Unassigned
Hoa Nguyen
Medium
Done
May 27, 2021
Jul 19, 2021
Bug
RubySystem::functionalRead with partial data support
Unassigned
Gabriel Busnot
Medium
Done
May 27, 2021
Jun 10, 2021
Bug
gem5 failed to build with ‘SLICC_HTML=True’ in v21.0
Unassigned
Rachel
Low
Done
May 26, 2021
May 28, 2021
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